FIGS. 1A to 1C illustrate an amplifier circuit 101 and its characteristics. FIG. 1A illustrates the amplifier circuit 101. The amplifier circuit 101 amplifies an input signal 102 and outputs an output signal 103. FIG. 1B is a graph representing an example of ideal characteristics of the amplifier circuit 101, and FIG. 1C is a graph representing an example of actual characteristics of the amplifier circuit 101. The curve of an output power 111 represents the characteristic of output power versus input power. The curve of a gain 112 represents the characteristic of gain versus input power. The curve of efficiency 113 represents the characteristic of efficiency versus input power. As to the output power 111, a region where the input power is small is a linear operating region 114 and a region where the input power is large is a saturated, nonlinear operating region. The amplifier circuit 101 is required to perform amplification such that the efficiency 113 is high and the output power 111 is linear with respect to the input power. The efficiency 113 increases as the output limitation (saturated output) of the amplifier circuit 101 is approached, and therefore it is desirable that the amplifier circuit 101 operate close to the saturated output. In the actual characteristics in FIG. 1C, however, the slope of the gain 112 of the amplifier circuit 101 gradually becomes smaller in a region 121 close to the saturated output, and, as a result, the gain of the amplifier circuit 101 is decreased and nonlinearity occurs. This poses a problem in that output signals at high powers are distorted.
There is known an amplifier including an amplifying element and a variable matching circuit, the variable matching circuit including at least one variable capacitative element that is provided on at least one of the input side and the output side of the amplifying element and whose electrostatic capacitance is caused to vary by application of a bias voltage.
There is also known a semiconductor circuit that includes a first Wilkinson divider/combiner for splitting and outputting an input signal input from an input terminal, an amplifying element for amplifying outputs of the first Wilkinson divider/combiner, and a second Wilkinson divider/combiner for combining together outputs of the amplifying element and outputting the result as an output signal from an output terminal, and in which variable capacitative elements are coupled to branch points of signal transmission paths in the first and the second Wilkinson divider/combiners.
Examples of the related documents include Japanese Patent Laid-open No. 2008-147730 and International Laid-open Patent Publication No. 2007/096940.